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MITSUBISHI DIGITAL ASSP MITSUBISHI DIGITAL ASSP
M66014FP M66014FP
16-BIT SERIAL BUS CONTROLLER 16-BIT SERIAL BUS CONTROLLER
DESCRIPTION M66014 Semiconductor Integrated Circuit is a serial bus controller. It converts 2-byte parallel data that arrives from microcomputer into serial and outputs it to serial bus. It also converts serial data input from serial bus into parallel and outputs it to microcomputer. The M66014 is used for the extension of microcomputer I/O ports and two-way communication with peripheral equipment connected with serial buses. FEATURES * Compatible with general-purpose 8-bit microprocessor busses * TTL level input (one microcomputer side) * Interrupt output * Schmitt input (RESET, CS, SIN) * Pin arrangement is fully compatible with M66011FP * Low power dissipation * Wide operating temperature range (Ta = -20 to 75C) APPLICATION Microcomputer I/O port extension, etc.
PIN CONFIGURATION (TOP VIEW)
RESET INPUT RESET WRITE INPUT CHIP SELECT INPUT WR CS D0 D1 D2 DATA BUS D3 D4 D5 D6 D7 GND
1 2 3 4
24 23 22 21
VCC RD A0 A1 READ INPUT ADDRESS INPUT
M66014FP
5 6 7 8 9 10 11 12
20 19 18 17 16 15 14 13
SCLK SHIFT CLOCK OUTPUT SOUT SERIAL DATA OUTPUT SIN OE INT Xin Xout VCC SERIAL DATA INPUT OUTPUT ENABLE OUTPUT INTERRUPT OUTPUT CLOCK INPUT CLOCK OUTPUT
Outline 24P2N-B
BLOCK DIAGRAM
A1 21 RESET INPUT RESET 1 CHIP SELECT INPUT CS 3 WRITE INPUT WR 2 READ INPUT RD 23 Xin 15 Oscillation circuit CLOCK OUTPUT 14 Xout
A0 22 SHIFT CLOCK OUTPUT 20 SCLK
Timing control circuit CLK, LOAD Shift register for lower byte serial output (8 bits) SRL CLK, LOAD Shift register for upper byte serial output (8 bits) SRU
16 INT INTERRUPT OUTPUT 17 OE OUTPUT ENABLE OUTPUT
CLOCK INPUT
19 SOUT SERIAL DATA OUTPUT
DATA BUS
D0 D1 D2 D3 D4 D5 D6 D7
4 5 6 7 8 9 10 11
8
CLK Shift register for serial input (16 bit) 8 Read register
18 SIN SERIAL DATA INPUT
8 X8
8
1
MITSUBISHI DIGITAL ASSP
M66014FP
16-BIT SERIAL BUS CONTROLLER
3. Serial data input/output operation A cycle of 16-bit serial output data setting and serial data communication starts with a write access given by microcomputer to transmission shift registers in M66014. M66014 has two 8-bit shift registers, on for upper byte (SRU), the other for lower byte (SRL). If the CS status rises from "L" to "H" after a write access is given to SRL, serial data communication is started. SRU 8-bit data and SRL 8bit data are output in series in this order. Output of each data starts from its most significant bit. At the CS rise edge, busy flag in M66014 is set, and OE output shifts from "H" to "L". Shift clock SCLK and serial data SOUT are then output. At SCLK fall edges, serial output shift register executes shifting operation, and data on shift register is output in series from pin SOUT. Serial input data from pin SIN is taken into input shift register at SCLK rise edges. After the SCLK 16T rise edge, the status of SOUT and OE shifts to "H" after one bit's delay of SCLK, and busy flag is reset. When interrupt output is being set to enable, INT output is set.
(Remarks) (1) If CS rises after write operation is executed on SRL only and not on SRU, SRU data is unstable. (2) When write operations executed on SRL, M66014 becomes ready for start of serial communication and stands by for detection of CS rise. However, if a read access is given after data is written on SRL while CS is maintained on "L" level, this standby status is canceled. To resume serial communication in this case, rewrite data on SRL and raise CS.
SRL write operation CS Busy flag (in M66014) OE INT
Serial communication period
SCLK 1T SOUT 2T 8T D08 9T D07 D06 D05 D04 D03 D02 D01 16T D00 (D0L) DI6 DI5 DI4 DI3 DI2 DI1 DI0
D015 D014 D013 D012 D011 D010 D09 (D7U)
(D0U) (D7L) DI9 DI8 DI7
SIN
DI15 DI14 DI13 DI12 DI11 DI10
Serial Communication Timing Chart
2


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